Effectiveness of microarchitecture test program generation - Design & Test of Computers, IEEE
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چکیده
FSM Models As formulated in prior work, Figure 2 shows the FSM model for each of the 512 branch history table entries.15-17 A cold start initializes all entries in the branch history table to the start state, strong not taken. Any conditional branch whose address directly maps to the same branch history table entry will cause transitions in that entry’s FSM when the branch is resolved in the execution stage. The current state of the FSM is used to make predictions (possibly overriding branch target address cache predictions) for instructions in the decode and dispatch stages. States Weak Not Taken and Strong Not Taken make a branch prediction of Not Taken (T = 0) while states Weak Taken and Strong Taken predict taken (T = 1). Figure 3 shows the FSM model for a branch target address cache entry that corresponds to an unconditional branch. When a new unconditional branch is first encountered, the content of the branch target address cache entry at the position of the round-robin pointer is removed (remove transition) and the branch is predicted not taken (state, T = 0). This is the initialization that allocates branch target address cache entry and loads both the fetch and target address of the branch instruction. After the branch is executed, the FSM transitions to the predicted-taken state. If the same unconditional branch is encountered, it is predicted to be taken (T = 1), and the FSM responds by selflooping on the predicted taken state. Figure 4 shows a six-state FSM for a branch target address cache entry corresponding to a Microarchitecture Test Program Generation 42 IEEE Design & Test of Computers ST T = 1 WNT T = 0 WT T = 1
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